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Case: You are a thermal engineer designing cooling solutions for computer chips. A typical cooling solution of chip packaging is shown in Figure 1a. As a simplified model, a chip (kc = 135 W/m-K) is mounted in a mother board (kb = 0.25 W/m-K) and a heat spreader (ks = 220 W/m-K) is placed on top of the chip and the board. All surfaces of the system are convectively cooled (Figure 1b). It is assumed that the system to be very long in the direction perpendicular to the paper, so that the problem is rendered into two- dimensional. Under steady operation, electric power dissipation in the chip provides for uniform volumetric heating at rate of q = 5.0×10) W/m3. Currently, the air convection is set with h = 50 W/m2·K and T∞ = 40°C. In order for the circuitry within the chip to survive, the chip temperature should not rise above 85°C.
Question 1: Set a nodal network in the chip, heat spreader, and the board (Figure b). Use a grid spacing of 3 mm. Derive all nodal equations. Note that a thermal symmetry condition exists. Provide discrete nodal equations (one for each different kind of nodes) and show their derivations.
Question 2: Solve nodal equations simultaneously.
Question 3: Present your temperature distribution solution found in (b) in a T-x plot. You can plot Ts of each row. Check if the packaging meets the industrial requirement (the maximum chip temperature of 85°C).
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