Reference no: EM13333107
1. Show how the value ASCII "MIRIAM" is stored in memory in Big Endian format starting at location 100 hexadecimal. Assume that each memory location stored two ASCII characters.
Memory Location
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Value Stored
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100
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101
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102
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2. A given microprocessor has words of 1 byte. What is the smallest and largest integer that can be represented in the following representations?
a) unsigned
b) sign- magnitude
c) ones complement
d) twos complement
e) unsigned packed decimal
f) signed packet decimal
3. Compare zero-, one, two-, and three- address machines by writing programs to compute
X = (A + B x C)/(D - E x F)
for each of the four machines. Do not modify the values of A, B, C, D, E, or F. If necessary, use a temporary location T to store the intermediate results.
The instructions available for use are as follows:
0 Address
|
1 Address
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2 Address
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3 Address
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PUSH M
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LOAD M
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MOVE (XßY)
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MOVE (XßY)
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POP M
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STORE M
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ADD (XßX + Y)
|
ADD (XßY + Z)
|
ADD
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ADD M
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SUB (XßX - Y)
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SUB (XßY - Z)
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SUB
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SUB M
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MUL (XßX x Y)
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MUL (XßY x Z)
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MUL
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MUL M
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DIV (XßX / Y)
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DIV (XßY / Z)
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DIV
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DIV M
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4. Convert the following formulas from reverse Polish to infix:
a) AB +C + D x
b) ABCDE + x x /
5. Convert the following formulas from infix to reverse Polish:
a) A + B + C + D + F
b) (A x B) + (C x D) + E
6. Assume a stack-oriented processor that includes the stack operations PUSH and POP. Arithmetic operations automatically involve the top one or two stack elements.
Beginning with an empty stack, what stack elements remain after the following instructions are executed?
Instruction
|
Stack (top number on left of stack)
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PUSH 4
|
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PUSH 7
|
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PUSH 8
|
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ADD
|
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PUSH 10
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SUB
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MUL
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7. Consider a processor in which a two-word instruction is stored at location 100 with its address field at location 101 as shown below.
Memory
Registers Address Content
PC =100
|
|
100
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Load to AC; Mode
|
|
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101
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Address = 600
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R1 = 300
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102
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Next instruction
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|
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:
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:
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XR = 200
|
|
200
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300
|
|
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:
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:
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BR = 300
|
|
300
|
700
|
|
:
|
:
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AC = ?
|
|
400
|
200
|
|
:
|
:
|
|
|
500
|
100
|
|
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:
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:
|
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600
|
400
|
|
|
:
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:
|
|
|
702
|
500
|
|
|
:
|
|
|
|
800
|
900
|
|
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:
|
:
|
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900
|
800
|
|
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|
|
|
|
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The first word of the instruction specifies the operation code and mode; the second word specifies the address part.
The values of the program counter (PC register), a general register (R1), the index register (XR), the base register (BR), and certain addresses in memory are as shown below.
Evaluate the effective address and the value that is loaded into the AC for the following addressing modes:
|
Addressing Mode
|
Effective address
|
Value of the operand loaded into the AC
|
a)
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Immediate
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b)
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Direct addressing
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c)
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Indirect addressing
|
|
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d)
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Register
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e)
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Register indirect
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f)
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Relative address
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g)
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Base register addressing
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h)
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Indexed addressing
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