Reference no: EM131090051

When a 256-byte block is written to a floppy disk, there are 256 separate single-address DMA cycles in cycle steal mode. This question deals with just one of these DMA transfers. There are 14 events listed below. First you will eliminate the events that do not occur during the DMA cycle that saves one byte on the disk. In particular, list the events that will not occur. Second, you will list the events that do occur in the proper sequence.

a) An interrupt is requested.

b) Registers are pulled from the stack.

c) Registers are pushed on the stack.

d) The DMAC asks the processor to halt by activating its Halt signal.

e) The DMAC deactivates its Halt request to the processor.

f) The DMAC tells the FDC interface that a FMA cycle is occurring by activating its Ack signal; the DMA Controller drives the address bus with the FDC address; the DMAC drives the control bus to signify a write cycle (e.g., R/W= 1); the memory drives the data bus; the FDC accepts the data.

g) The DMAC tells the FDC interface that a DMA cycle is occurring by activating its Ack signal; the DMAC drives the address bus with the memory address; the DMAC drives the control bus to signify a memory read cycle (e.g., R/W= 1); the memory drives the data bus; the FDC accepts the data.

h) The FDC deactivates its DMA Request signal to the DMAC.

i) The FDC requests a DMA cycle to the DMAC by activating its Request signal.

j) The interrupt service routine is executed.

k) The write head is properly positioned over the place on the disk.

l) The processor address and control lines float; the processor responds to the DMAC that it is halted by activating its HaltAck signal.

m) The processor resumes software execution.

n) Wait until the current instruction is finished executing.