Plot the voltage in the cap vc for all times

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Reference no: EM13280414

Circuit is C = 1 F
Initial condition is Vc(0) = -1 volts
Assume input is the current source i s(t)
voltage in capacitor Vc(t) the output
Let the current int he circuit be is(t) = u(t -1) and the initial voltage in the cap be Vc(0) = -1 volts. PLOT the voltage in the cap Vc(t) for all times. Suppose we double the current is(t) = 2u(t) - u(t -1) but keep same initial condition, PLOT the voltage in the cap Vc(t) for all times and compare the two, Is the cap w/ non zero a linear system, explain

Reference no: EM13280414

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