Obtaining a d-latch and in each case draw the logic diagram

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Reference no: EM13293882

The D-Latch is constructed with four NAND-gates and an inverter. Consider the following three other ways for obtaining aD-Latch, and in each case draw the logic diagram and verify the circuit operation:

Use NOR-gates for all four gates. Inverters may beneeded

Use four NAND-gates only (without an inverter). This can be done by connecting the output of the left upper-gate that goesto the SR-Latch to the input of the left lower-gate (instead of the inverter)

Reference no: EM13293882

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