Reference no: EM131249515

Project - SOI Devices: Energy Balance and Lattice Temperature Model

1. Modify the script accordingly to simulate, using the parameters given in the table below, 25, 45, 90, 120 and 180 nm gate-length fully depleted SOI devices and produce the following outputs:

a. Output characteristics when using both drift diffusion and energy balance model. Assume channel length of 25, 90 and 180 nm.

b. Velocity of the electrons in the channel for the final bias conditions (for each of the 25, 90 and 180 nm channel length devices) by including the output velocity statement in the script. Use the cutline feature of Tonyplot to plot the drift velocity along the channel. Use depth of 3 nm from the top semiconductor oxide interface.

2. For the 25, 45 and 180 nm gate-length device perform isothermal energy balance and non-isothermal energy balance calculation of the device output characteristics. Comment on the results obtained in terms of:

a. Current degradation for final bias.

b. Temperature distribution profile in the device, and

c. Joule heating distribution profile in the device for the final bias conditions.

3. Perform energy balance calculation for the device with 25 and 180 nm channel length and momentum and energy relaxation times equal to 0.15 ps, 0.2 ps and 0.25 ps. Comment on the results obtained.

Gate Length Lgate (nm)	Oxide Thickness tOX (nm)	Source/Drain Length LS/D =Lgate (nm)	Silicon Layer Thickness tsi = 0.4Lgate (nm)	BOX Thickness  tBOX (nm)	Source/Drain Doping Concentration ND (m-3)	Channel Doping Concentration NA (m-3)
25 (1.2 V)	1.2	25	10	40	1×1026	1×1024
45 (1.5 V)	2	45	18	60	1×1026	1×1024
90 (1.8 V)	2	90	36	120	1×1026	1×1023
120 (2 V)	3	120	48	160	1×1026	1×1023
180 (2.5 V)	3	180	72	200	1×1026	1×1023

Attachment:- Project Assignment.rar