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Modify the multi-cycle MIPS processor

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Modify the multi-cycle MIPS processor to implement the jal instruction. The register-transfer description of jal is: $ra ← PC + 4; PC ← { PC[31:28] , (jumpadr << 2) } Mark your changes on the attached multicycle processor and state transition diagram. Briefly describe purpose of additions/changes.

Reference no: EM133294956

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