Reference no: EM131304845
OBJECTIVES:
The objectives of this experiment are:
1) To investigate the operation of automatic reset circuits.
2) To understand the difference between a positive edge triggered, negative edge triggered, and a level triggered flip-flop.
PROCEDURE 1: Automatic reset circuits
Many times, it is desirable to reset the JK flip-flops when the power is first turned on. To reset a JK flip-flop it is necessary to momentarily connect the CLR input to logic 0. After a few microseconds, the CLR input can then go to logic 1 and the JK flip-flop can be operated in synchronous mode. To accomplish this we may use an RC circuit. Initially the capacitor is discharged. When the power (VCC) is applied to the circuit, it causes the capacitor to charge to VCC through the resistor. Remember that in a "series RC circuit", the capacitor is considered fully charged after 5 time constants (t = 5RC). When the power is turned on, the CLR input of the JK flip-flop will receive a logic 0 and then as the capacitor charges up, the CLR terminal will be pulled up to +5V after a delay of 5 time constants.
a) Construct the circuit as shown in Figure 1.
Fig. 1 Automatic reset of a 74LS76 JK flip flop
b) Set switches A and C to logic 1 and switch D to logic 0. Connect the pulser to switch X for normally high (normally high means the switch is in the up position), then toggle the switch downward and next, up again.
c) This should cause the LED monitor to turn on indicating that the output Q of the flip-flop is at logic 1.
d) Turn the power supply OFF and then ON. You should observe that the output Q of the flip- flop is reset to logic 0. Repeat this procedure at least 3 times, and each time you should observe that the output of the flip-flop is reset to logic 0.
PROCEDURE 2: Positive edge triggered, negative edge triggered, and level triggered flip-flops.
a) Construct the circuit as shown in Figure 2.
Fig. 2 Circuit to test the differences between the 74LS74, 74LS76, and 7475 flip-flops
b) To turn on LED displays 1 and 2, set switch A to logic 0 and switch B to logic 1. Check your circuit if all three LED displays stay off. Press (toggle down) and release (toggle up) the normally high pulser (e.g., switch X on the trainer board). Do the outputs of the first 2 flip- flops change?
c) While keeping switch A at logic 0 and switch B at logic 1, set switch C to logic 1 then to logic 0. Are there any changes in the states of the first two outputs (LED 1 and LED 2)? Why?
I got to know more about the ICs 74LS76 and 74LS74 by changing logic of the switches
d) Repeat steps a) and b), but this time switch A should be set to logic 1 and switch B should be set to logic 0. Are there any changes in the states of the first two outputs (LED 1 and LED 2)? Why?
e) Now set switch A and switch B both to logic 1. Fill in the following table:
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Switch A
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Switch B
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Switch C
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The Pulser
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LED 1
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LED 2
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LED 3
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1
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1
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0
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Up Position
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1
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1
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0
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Down position
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1
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1
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1
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Up Position
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1
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1
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1
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Down position
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f) With the pulser high (X switch is up), change the state of switch C from logic 1 to logic 0 and then back to logic 1. What do you observe?
Repeat Step f with the pulser is low. What do you observe?
Complete the following timing diagram:
