Instruction is executable in one execute cycle

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Reference no: EM1325484

The MIPS ALU (see enclosed figure) is extended to support an instruction "set-on-not-equal-signs". The instruction 'snes $rd, $rs, $rt' is similar to 'slt'. It sets $rd to '1' if the sign bit of $rs sign bit of $rt. Your task is to add the minimum required hardware to the ALU so that this instruction is executable in one execute cycle (that is one cycle not counting the fetch and execute).

Reference no: EM1325484

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