Improve the performance of the set associative cache

Assignment Help Computer Engineering

Reference no: EM131677917

Topic: Computer Architecture

Question 1: Consider the following information. The ideal CPI = 1 cycle, clock rate = 1GHz, L1 miss rate = 2%, main memory access time is 100ns, L2 cache has a global miss rate of 0.5% and hit time of 10 cycles. Find the CPIs with and without L2 cache.

Question 2: Consider the following two cache organizations.

A direct mapped cache with an access time of 2ns and an average hit rate of 90%
A 4-way set associative cache with an access time of 6ns and an average hit rate of 95%.

Assume the cache miss penalty is 10ns. We want to use way prediction to improve the performance of the set associative cache. If a way prediction hit takes as long as a direct- mapped access, and a way-prediction miss adds an additional 6ns to the hit time of the 4-way associative cache, how accurate must the way predictor be to match the average access time of the direct-mapped cache?

Reference no: EM131677917

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