Implementation of algorithm using vhdl under quartus

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Reference no: EM13225320

Implementation your algorithm using VHDL under Quartus. You are free to select the structural hierarchy of the implementation; the implementation could be behavioral, structural, or a mixed implementation.

input .

x - the abscissa at which the linear interpolation is to be evaluated

xi[]- the arrays of data abscissas

yi[]- the arrays of data ordinates

imax- size of the arrays xi[] and yi[]

output .

y - interpolated value

double y;

int j;

// if x is ouside the xi[] interval take a boundary value (left or right)

if (x <= xi[0]) return y = yi[0];

if (x >= xi[imax-1]) return y = yi[imax-1];

// loop to find j so that x[j-1] < x < x[j]

j = 0;

while (j <= imax-1)

{

if (xi[j] >= x) break;

j = j + 1;

}

y = yi[j-1] + (yi[j] - yi[j-1])*(x - xi[j-1])/(xi[j]-xi[j-1]);

return y;

}

Reference no: EM13225320

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