Reference no: EM133269291

1. How many thermal limit of silicon challenge addressed? just or two words only for the answer

2. How is performance affected between individual blades and intra-blade centers?

A. processor sharing is higher

B. Bandwith in backplane connection is higher

C. Transmission control is higher

D. latency in backplane connection is higher

3.introducing more processor into a chip instead of increasing clock frequency minimizes which processor?

A. over clocking

B. Register spill

C. delay in execution

D. over heating

4. Within multiprocessors, UNIX Systems and it programs identify with multiple cores of the processor. True or False?

5. What was the main challenge after processor frequencies hit the thermal limit of silicon? Note: just one or two words

6.Which layer caches shared in a multicore processor?

A. L1

B. all of the Above

C. L3

D. L2

7.To achieve a better communication, list one system requirement within a blade center? note: just one or two words

8. To hold an instruction value temporary, which of the following do you suppose a multicore processor design uses?

A. disk

B. L1 cache

C. Memory

D. Register

9.When you are building a store's checkout POS, which design is more applicable?

A. Disk design

B. Memory Design

C. Register Design

D. Processor Design

10. what is the best implementation approach to a blade center cloud?

A. Increase bandwith between layers

B. Resource sharing

C. Multicore Processing

D. Networking