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1. A common chip is a 4-bit adder. Four of these chips can be hooked up to form a 16-bit adder. How many pins would you expect the 4-bit adder chip to have? Why?
2. An n-bit adder can be constructed by cascading n full adders in series, with the carry into stage i, Ci , coming from the output of stage i - 1. The carry into stage 0, C0, is 0. If each stage takes T nsec to produce its sum and carry, the carry into stage i will not be valid until iT nsec after the start of the addition. For large n the time required for the carry to ripple through to the high-order stage may be unacceptably long. Design an adder that works faster. Hint: Each Ci can be expressed in terms of the operand bits Ai - 1 and Bi - 1 as well as the carry Ci - 1. Using this relation it is possible to express Ci as a function of the inputs to stages 0 to i - 1, so all the carries can be generated simul- taneously.
Binary search tree, and postorder and preorder traversal Determine the shortest path in Graph
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