Reference no: EM132986797

Review Exercises

1. Write a definition for all the italicised terms in this unit.

2. Non-volatile RAM (NVRAM) is a combination of RAM and EEPROM memory. Data is read from/written to RAM, and backed up to the EEPROM at appropriate times. Can you think of an application where this would be useful?

3. (a) Outline how I/O modules could use the interrupt line to move data to memory as soon as it is available. What are the relative advantages/disadvantages compared to DMA.

(b) Most microprocessors have a single interrupt, line; multiple interrupts are handled by a special I/O module known as an interrupt controller, which has access to the micropro- cessor interrupt line Suggest ways in which interrupts from multiple devices could each be handled (with their own handler) in such a scheme. Should an interrupt be allowed to interrupt another interrupt?

(c) "A DMA module is transferring characters to memory using cycle stealing, from a device transmitting at 9600 bps. The processor is fetching instructions at the rate of 1 million instructions per second (1 MIPS). By how much will the processor be slowed down by DMA activity?" - question taken from (Stallings 2000; 6.5)

4. List the issues to be considered in the design/choice of the following items for a particular application:
(a) CPU
(b) bus
(c) memory
(d) peripherals

5. Role Play/Challenge question taken from (Stallings 2000; 6.9): CC

Two boys are playing on either side of a high fence. One of the bOys named Apple- server, has a beautiful apple tree loaded with delicious apples growing on his side of the fence; he is happy to supply apples to the other boy whenever needed. The other boy named Apple-eater, loves to eat apples but has none. In fact, he must eat his apples at a fixed rate ...If he eats them faster than that rate he will get sick. If he eats them slower, he will suffer malnutrition. Neither boy can talk, so the problem is to get apples from Apple-server to Apple-eater at the correct rate

(a) Assume that there is an alarm clock sitting on top of the fence and that the clock can have multiple alarm settings. How can the clock be used to solve the problem? Draw a timing diagram to illustrate the solution.

(b) Now assume that there is no alarm clock. Instead Apple-eater has a flag that he can wave whenever he needs an apple. Suggest a new solution. Would it be helpful for Apple-server also to have a flag? If so, incorporate this into the solution. Discuss the drawbacks of this approach.

(c) Now take away the flag and assume the existence of a long piece of string. Suggest a solution that is superior to that of (5b) using the string.

6. One difference between Dynamic RAM (DRAM) and Static RAM (SRAM) is:

(a) DRAM loses information when power is switched off, but SRAM retains information when power is switched off.

(b) DRAM tends to be more expensive than SRAM.

(c) DRAM tends to be less dense than SRAM.

(d) DRAM is faster than SRAM.

(e) DRAM loses information unless it is periodically refreshed, SRAM will retain information indefinitely.

7. Which of the following statements about the components of a computer are correct(if any):

(a) The ALU is the part which executes the program.
(b) The bus conveys information between the CPU and the microprocessor.
(c) The clock signal is used by the CPU to time the phases of the instruction cycle.
(d) A microprocessor is a CPU plus peripherals on a single chip.
(e) Memory may be read-only (RAM) or read-write (ROM).

8. Which ONE of the following statements about interrupts is correct:
(a) Interrupts occur when peripherals send bit-parallel signals to the CPU across the bus.
(b) Interrupts occur when memory devices send bit-parallel signals to the CPU across the bus.
(c) Interrupts occur when the CPU exerts a special signal line connected to a peripheral.
(d) Interrupts occur when peripherals exert a special signal line connected to the memory.
(e) Interrupts occur when peripherals exert a special signal line connected to the CPU.

9. Choose the best answer. The memory map side affects the nature of the microprocessor-based system bus, because:
(a) the number of data lines must match the memory bit-width.
(b) the number of address lines must allow the entire address range to be addressed.
(c) if the number of data and address lines are the same, the lines can be multiplexed.
(d) 9a and 9b are true but 9c is false.
(e) 9a, 9b and 9c are ill true.

"'Role Play- Investigate bus issues such as, contention arising from two devices with the same dress, or no device responding to the address, on both a synchronous and asynchronous' bus, ,and where data and address lines are shared or separate.

Suggest lining up people (devices) with transparencies representing the data they will place on the bus. Person at back (the bus state) writing on a pad of slightly translucent paper, from back to front, so we can see the transient state of the bus. Other persons to represent the clock or signalling lines, and the address lines(transparency if shared bus lines).