Highest allowable voltage at the output

Reference no: EM131018128

Design the circuit of Fig. 8.32 to provide an output current of 100 μA. Use VDD = 3.3 V, and assume the PMOS transistors to have μpCox = 60 μA/V2, Vtp = -0.8 V, and /VA /= 5 V. The current source is to have the widest possible signal swing at its output. Design for VOV =0.2 V, and specify the values of the transistor W/L ratios and of VG3 and VG4. What is the highest allowable voltage at the output? What is the value of Ro?

Reference no: EM131018128

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