Reference no: EM131077636

ECET 340(Microprocessor Interface) FINAL ,FALL 2015

1. Which of the following best describes the action of a keypad driver program?

Each row is activated one at a time until a column is found active.

All eight keypad pins inject signals into port pins configured as input pins.

The active key connects a port pin to common ground on the keypad.

The keypad contains logic, which actively generates a 4-bit code for every key.

Question 2. 2. Which of the following is not an advantage of an LCD compared to an LED display?

Ease of programming

Limited to display numbers and a few characters

Ability to display numbers, characters, and graphics

Declining prices

Question 3. 3. For the LCD, describe the function accomplished with the R/W~ control signal. Also, indicate whether this signal is an LCD input or LCD output.

Question 4. 4. In the standard set-up of a keypad, the four rows are connected to 9S12G128 output ports, and the four columns are connected to input ports with internal pull up resistors enabled. In your own words, describe how the scanning program determines which key is pressed.

Question 5. 5. What are the advantages and disadvantages of using 4-bit data lengths to interface the 9S12G128 with an LCD?

Question 6. 6. Interrupts are enabled when _____.
I = 0, X = 0

I = 0, X = 1

I = 1, X = 0

I = 1, X = 1

Question 7. 7. For the 9S12G128 microcontroller external interrupt, what is the signal condition that causes an interrupt to occur?
Falling edge

Logic LOW

Rising edge

Depends on the initialization of the external interrupt

Question 8. 8.  The address of an ISR in the 9S12G128 is contained in the _____.

ISR location

interrupt address

interrupt vector

interrupt enable

Question 9. 9. In your own words, explain why a programmer uses a cli instruction in an ISR.

Question 10. 10. Which of the following is not part of the 9S12G128 embedded timer unit?

Input capture

Output capture

Output compare

Pulse-width modulation

1. The 9S12G128 event counter is configured and enabled for rising edge. A 1.0 Hz waveform (TTL logic levels) is applied to the counter input. With the counter starting at 0x0000, what is the data contained in the event counter after 16.52 seconds (first count increment occurred at 0 seconds)?

0x0011

0x0010

33

16.5

Question 2. 2.  In your own words, describe why DACs use the R-2R ladder configuration instead of a binary ladder.

Question 3. 3. What is the resolution for the HCS12 ATD in 10-bit mode with a reference voltage of +5V?

4.82 µV

4.82 mV

19.5 mV

48.2 µV

Question 4. 4. The 9S12G128 ADC is configured for 10-bit and right justified. Indicate the contents of the ADC data register (ATDDRn) for a reading of 605?

0000 0110 0000 0101

0000 0010 0101 1101

0010 0101 1101 0000

1001 0111 0100 0000

Question 5. 5. Which of the following types of analog-to-digital converters is used in the 9S12G128?

Dual-slope

Flash

Successive approximation

Sigma-delta

Question 6. 6.  What is required for the connection of an x86 PC serial com port RxD input with the 9S12G128 serial interface TxD output?

A CMOS to TTL converter

A TTL to CMOS converter

A TTL to RS232 level shifter

A RS232 to TTL level shifter

Question 7. 7. A transducer has a device signal range of 0 V to 1.25 V. The ADC input signal range is 0 V to 5 V. Describe the signal conditioning circuit that is needed to use the full-scale range of the ADC.

Question 8. 8. For asynchronous communications, 10 bits make up the data frame. With a start bit, one stop bit, and no parity bit, how many bits are set aside for the data?
6 bits

7 bits

8 bits

10 bits

Question 9. 9. Which data transfer rate is not a standard baud rate for the x86 PC?

9600

4800

2400

1800

Question 10. 10.  In programming for readability, what is meant by prologue for the main? Provide an example that includes the key elements.

1.  To measure pulse width using input capture, the embedded timer must trigger which of the following?

A rising edge followed by a falling edge

A falling edge followed by a rising edge

A rising edge followed by a rising edge

A falling edge followed by a falling edge

Question 2. 2. The operation of combining two independent 9S12G128 8-bit PWM counters as a single 16-bit counter is called which of the following?

Concatenation

Combination

Concurrency

Connectivity

Question 3. 3. If an event is captured at a reading of 0x72AC, and the next event is captured at a reading of 0xAA4F, how much time has elapsed between the two events? The E-clock is 24 MHz.

Question 4. 4.  What is the minimum number of bits required for a DAC that can span 12V with a resolution of 20 mV or less?

8

10

12

14

Question 5. 5. What is the resolution, in percent, of a 12-bit DAC?

0.00024%

0.00048%

0.024%

0.12%