Find how much overhead will be needed for the new design

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Reference no: EM13294211

Consider a VLSI chip with 100,000 gates and 2000 flip flops. A combinational ATPG program produces 500 vectors to fully test the logic. Find the minimum number of scan test cycles if 20 scan chains are implemented. Given that the circuit has 20 primary input and 20 primary output data pins and only one extra pin available for test ,how much overhead will be needed for the new design?

Reference no: EM13294211

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