Explain what occurs if instruction going through pipeline-lb

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Reference no: EM1370608

Consider a processor with 6 stages: IF(instruction fetch), DA(instruction decode), CO(calculate operands addresses), FO(fetch operands), EX(instruction execution), WB(write results).

a) Describe briefly what happens in each stage when the instruction going through the pipeline is an LB?

b) What if the instruction is an ADD?

Reference no: EM1370608

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