Reference no: EM13806616
The objective of this lab is to simulate and evaluate a virtual memory system, and experiment with different page replacement algorithms. You will need a threads package, e.g., pThreads thread package.
Assume that you have a 16-bit address space, 16 KB of main memory, and 2 KB page size. Virtual memory simulation consists of three components: a virtual address generation component, address translation component, and a statistics reporting component. Implement each component by a separate thread.
The virtual address generation component generates a sequence of 16-bit virtual addresses and writes them in an integer buffer inBuffer of size 10. Write a function getNextVirtualAddress( ) for generating virtual addresses. This function may generate virtual addresses at random or based on a trace obtained from some source.
The address translation component implements virtual address to physical address translation using a page replacement algorithm (select a page replacement algorithm). This component reads the next virtual address from inBuffer and translates that address to a physical address. It prints the virtual address and corresponding physical address in a file. It also increments an integer variable (numberOfPageFaults) on every page fault. Use appropriate bit operations (<<, >>, ~, |, &, etc.) to implement this address translation. Feel free to implement a separate version of this component for every page replacement algorithm you want to experiment with.
The statistics reporting component prints the total number of page faults (numberOfPageFaults) at the end.
Attachment:- virtula memory.txt
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