Enter the design into verilog

Reference no: EM132404867

Question 1. Given the state diagram below, you have all the information you need to enter the design into Verilog. Do so (neatly) and turn it in as a word file or hand-written paper. Include everything except the .ucf file.

Question 2. The datasheet for the RAM chip on the Nexys3 development board is on the Schoology site. On page 11, figure 6 shows the write cycle timing diagram. Prepare a state-diagram design to write an 8-bit word of your choice to address 'h00FF' whenever some input goes high (like our ever-popular slider switches). Include all the details one would need to hand your diagram to a co-worker and have him/her run off and code it without any more input from you. In other words, label all transitions and provide the outputs per state, probably a table like in problem 1 would be best since there are multiple outputs.

Reference no: EM132404867

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