Reference no: EM133141873

EEET2162 / 2035 - Advanced Digital Design / Design with Hardware Description Languages Laboratory Project - RMIT University

AIMS -

(i) To design, simulate, implement and test a digital circuit using the Quartus Prime toolchain.

(ii) To demonstrate the workflow when using the Verilog HDL to construct a design for a physical Field Programmable Gate Array (FPGA) target.

(iii) To develop a hierarchical design where an emphasis is placed on the development of small sub-modules which can be replicated to form a complete system.

(iv) To develop a large-scale Verilog HDL project that will require numerous sub-modules that are required to work together to achieve a common complex task.

TOPIC LIST -

a) HDMI processing and overlay (on-screen display) using the Cyclone V

b) Platform Designer implementation of an SPI communication interface

c) Audio signal capture and processing using the onboard ADC.

d) ATmega32A Emulation.

e) Floating-point Unit Development

Note - Choose option d - ATmega32A Emulation.

ASSESSMENT -

To assess the project both a combined final technical report and group presentation / demonstration are required.

a) Project Technical Report

Students are required to individually submit a final project technical report (maximum of twelve (15) pages in body of report) describing the work undertaken during the project. The report should be written in such a way that it can be read and understood by another Engineer with a background in FPGA design and development. Note that the same report is to be submitted by both group members. The report (and background material relating to the development of the project including schematics, PCB layouts and source code) must be submitted to the subject Canvas website by Friday, Week 12 at 11:59pm. A late penalty of 10 marks per day (including weekends) will apply if the required content is note received by the due date / time.

As a general guideline the project report should include, but not be limited to, the following sections:

-Title page: include the project title, the date, student ID and name(s) and the revision number.

-Acknowledgements: note (and references) any IP blocks or source code.

-Executive summary: state the main achievements of the project. This is a summary of key findings, achievements, and measurements. It is not an introduction. The words limit is 150.

-Table of contents: section titles and page numbers for your report.

-Introduction: provide an overview and define the scope of the project.

-Literature search: a brief indication of what references and external information were sought and used. The literature review should be limited to technical information that is relevant to explain the concepts and problems addressed in the project.

-Technical work and Results (Students may choose own section titles here): this part may contain a description of the process used to develop the deliverables and a complete description of what has been created. Students can elaborate on their contribution to the project and compare obtained results with those in literature or other known solutions. A clear delineation should exist between existing techniques and solutions and student work. A comparison should be undertaken against the original deliverables of the project and what has been delivered. If discrepancies exist then the reasons should be elaborated (even incorrect or unexpected results and still worth discussing). This section should form the bulk of the report. Technical content may include state diagrams, relevant truth-tables and block diagrams explaining the HDL used in realising the solution. A discussion should be held on the HDL modules developed and their interconnections. Simulation results can also be included in the report to explain / demonstrate project outcomes.

-Discussion and Conclusion: Students should provide a discussion of the (simulation) results, clearly stating their achievements, lessons learnt and possible future works.

-References: All references quoted in the report (where relevant) should be listed down in the manner and style indicated below and numbered sequentially in the order as they appear in the main text. However, the list should not contain any entry that has not been quoted anywhere in the report. The IEEE reference format is to be used.

-Appendices: These must also be properly titled and should contain details which are of secondary importance in understanding the report. Examples include program listings, schematics and detailed specifications of important components. Note that the full HDL solution does not need to appear in the appendices as it is to be submitted electronically.

b) Project Technical Demonstration

Students will be required to demonstrate their complete project to the Course Coordinator in Week 12 at their scheduled time. Each student group will have approximately seven (7) minutes to describe and demonstrate their technical achievements. A further three (3) minutes will be made available for questions. Additional material, such as diagrams and images can be used to support the discussion. The demonstration component accounts for 15% of the overall subject grade and will be individually graded. Note that the demonstration is informal and will generally involve viewing the project outcomes around one of the laboratory computers. Students are requested to ensure that their project is functional prior to the assessment time. No time compensation will be given if the project is not ready to view at the schedule time.

Attachment:- Advanced Digital Design Assignment File.rar