EECE71425 Digital Systems Assignment

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Reference no: EM133067994

EECE71425 Digital Systems - Conestoga College

Supplemental Laboratory

This is a two parts lab. In the first part you must design the counter. In the second part you must build and simulate the design.

Design and implement a Modulo-5 counter.

• copy the seven_seg files in your working directory (the 7-segment display)

• design the counter using J-K flip-flops

• make the counter the top file in the hierarchy

• attach to your report the state transition table, the K-maps, the output equations, and the schematic

• create a simulation file for the counter and make sure it works; attach it to your report.

Attachment:- Supplemental_Lab.rar

Reference no: EM133067994

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Reviews

len3067994

1/16/2022 11:49:26 PM

I have done my K-mapping and truth table I need help with the schematic and waveform This is the seven-segment please use Quartus We are to use Quartus Don't put the schematic, waveform, block diagram in word. (output screenshot required) I need them like this in this form in Quartus just take screenshot like this

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