Reference no: EM131668719

Analogue Electronics Mid-Term Examination Questions

QUESTION 1 -

(a) Fig. 1(a) shows an instrumentational amplifier. It has a differential gain, A_d, with which the output voltage ,V_o, is related to the differential input, V_id = V₂-V₁. Show that the differential gain, A_d, is given by the following expression assuming all op-amps are ideal.

A_d = R₄/R₃ (1+ R₂/R₁)

(b) In estimating DC imperfections (input offset voltage, input offset current and the bias current) of an op-map, an inverting amplifier with nominal gain of -100 using 100kΩ and 10MΩ resistors is implemented using the op-amp as shown in Fig 1(b) below.

Measurements are conducted on the output voltage of the inverting amplifier under the following conditions: (i) the input (V_i) is open circuited and the output voltage is found to be +9.31V; (ii) the input (V_i) is grounded and the output voltage is found to be +9.09V; (iii) the inverting amplifier is further modified by connecting a 10MΩ resistor between the positive input terminal and ground (shown in Fig. 1(c)) and the output voltage is measured to be -0.8V with the input (Vi) opened. What are the estimate values of the input offset voltage, input offset current and input bias current of the op-amp?

(c) In reference to fig. 1(a), assume all op-maps have same DC imperfections as the op-amp measured in (b) and R₁ = 1kΩ, R₂ = 10kΩ, R₃ = 10kΩ and R₄ = 1MΩ, estimate the worst case output offset voltage?

(d) In reference to fig. 1(b), the op-amp used in the inverting amplifier has large signal limitations and other characteristics as provided in table 1 in addition to the estimated DC imperfections and the values of resistors used in the inverting amplifier are now changed to R₁ = 1kΩ and R₂ = 10kΩ.

i. Estimate the bandwidth of the amplifier assuming that the internal compensation capacitor creates the dominant pole in the frequency response of the op-amp?

ii. With V_in = V_Acos(ωt) and V_A = 1V , will there be a frequency at which the output (V_o) will be distorted? If so, what is that frequency?

iii. With V_in = V_Acos(2π1000t) where V_A = 1V and assuming that a resistive load is connected at the output between node V_o and ground, what is the constrain on the resistive load if the output is to be undistorted?

QUESTION 2 -

The circuit in fig. 2 is a Cascode amplifier consisting of a MOSFET input stage (Q1) and a bipolar (Q2) output stage. The Cascode amplifier is biased by a current source established by a MOSFET current mirror pair Q3 and Q4. Transistor aspect ratios (W/L) of the MOSFETs are indicated in the figure. Details of small signal model parameters are given in the information sheet on page 3.

(a) Determine the DC biasing current in transistors Q1 and Q2.

(b) Hence, calculate the g_m1 of Q1 and g_m2, r_π2 of Q2.

(c) Hence, calculate the DC voltages at nodes x, y and z (you may neglect the base current of Q2). Show that transistor Q1 is operating in the saturation region.

(d) Draw the small-signal equivalent circuit of the amplifier suitable for mid-band analysis. Hence, calculate the mid-band gain (V_o/V_s). (Justify any approximations you make to simplify the analysis).

(e) Draw the small-signal equivalent circuit of the amplifier in the form suitable for low frequency AC analysis and determine the lower 3dB frequency using the short-circuit time constant method.

(f) Draw the small-signal equivalent circuit of the amplifier in the form suitable for high frequency AC analysis and provide a brief explanation why the Cascode arrangement helps to improve the bandwidth.

(g) Hence, determine the upper 3dB frequency of the Cascode amplifier (consisting of Q₁ and Q₂ only) by the open-circuit time constant method. Justify any assumption made.

Attachment:- Assignment File.rar