Draw the logic diagram for the hierarchical component

Reference no: EM131026796

Design a circuit to implement the following pair of Boolean equations:

F = A(CE^- + DE) + A^-D

G = B(CE^- + DE) + B^-C

To simplify drawing the schematic, the circuit is to use a hierarchy based on the factoring shown in the equation. Three instances (copies) of a single hierarchical circuit component made up of two AND gates, an OR gate, and an inverter are to be used. Draw the logic diagram for the hierarchical component and for the overall circuit diagram using a symbol for the hierarchical component.

Reference no: EM131026796

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