Draw a state transition diagram for a machine

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Long-String Comparator Develop an FSM that detects if two serial bit streams a and b of length N are pair-wise equal. This is an extension to the example of section 11.7.2 in which the FSM had to detect if the last N bits were equal. The circuit ports are depicted in the upper part of figure 11.19 , which also shows an XNOR gate ( x = ‘ 1 'when a = b). The desired behavior is also illustrated in the figure for N = 4. Note in the y and done waveforms that after every four bits, starting right after the reset pulse, done must be asserted, informing that a complete block has been inspected, with y high during that pulse if the four pairs of bits were equal ( x = ‘ 1 'in all four time slots) or low otherwise.

(a) Draw a state transition diagram for a machine that solves this problem for any (arbitrarily long) value of N .

(b) Based on your solution, fill in the missing plots in figure 11.19 .

Reference no: EM131176882

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