Reference no: EM131541492
Assignment
Answer the following questions.
1. Do binary addition problems a to h (show your work):
a. 101 + 011 = e. 1000 + 1000 =
b. 110 + 101 = f. 1001 + 0111 =
c. 111 + 111 = g. 1010 + 0101 =
d. 1000 + 0011 = h. 1100 + 0101 =
2. Draw a block diagram for a half adder (label two inputs and two outputs).
3. Draw a block diagram for a full adder (label three inputs and two outputs).
4. Do binary subtraction problems a to h (show your work):
a. 1100 - 0010 = e. 10000 - 0011 =
b. 1101 - 1010 = f. 100 - 0101 =
c. 1110 - 0011 = g. 10010 - 1011 =
d. 1.111 -0110= h. 1001 - 0010 =
5. Draw a block diagram of a half subtractor (label two inputs and two outputs).
6. Draw a block diagram of a full subtractor (label three inputs and two outputs).
7. Draw a block diagram of a 2-bit parallel adder (use a half and a full adder).
8. Use circuit simulation software to (1) construct a full-adder circuit like the one in Fig. 10-6(a), (2) test the circuit, and (3) show your instructor your circuit and results.
9. Do binary multiplication problems a to h (show your work). Check your answers using decimal multiplication.
a. 101 X 011 = e. 1010 X 011 =
b. 111 X011 = f. 110 x 111 =
c. 1000 X 101 = g. 1100 X 1000 =
d. 1001 X 010 = h. 1010 X 1001 =
10. List two methods of doing binary multiplication with digital electronic circuits.
11. Convert the following signed decimal numbers to their 4-bit 2s complement form:
a. +1 =
b. +7 =
c. -1=
d. -7 =
12. Convert the following 4-bit 2s complement numbers to their signed decimal form:
a. 0101 = c. 1110
b. 0011 = d. 1000
13. Convert the following 8-bit 2s complement numbers to their signed decimal form:
a. 0111 0000 c. 1000 0001
b. 1111 1111 d. 1100 0001
14. Convert the following signed decimal numbers to their 8-bit 2s complement form:
a. +50 c. -50
b. -32 d. -96
15. Add the following 4-bit 2s complement numbers. Give each sum as a 4-bit 2s complement number. Also give each sum as a signed decimal number.
a. 0110 + 0001 = c. 0001 + 1100 =
b. 1101 + 1011 = d. 0100 + 1110 =
16. Subtract the following 4-bit 2s complement numbers. Give each difference as a 4-bit 2s complement number. Also give each difference as a signed decimal number.
a. 0110 - 0010 = c. 0010 - 1101 =
b. 1001 - 1110 = d. 1101 0001 =
17. Add the following 8-bit 2s complement numbers. Give the sum in 8-bit 2s complement notation. Also give each sum as a signed decimal number.
a. 0001 0101 + 0000 1111 =
b. 1111 0000 + 1111 1000 =
C. 0000 1111 + 1111 1100 =
d. 1101 1111 + 0000 0011 =
18. Subtract the following 8-bit 2s complement numbers. Give the difference in 2s complement notation. Also give each difference as a signed decimal number.
a. 0111 0000 - 0001 1111 =
b. 1100 1111 - 1111 0000 =
c. 0001 1100 - 1110 1111 =
d. 1111 1100 - 0000 0010 =
19. See Table 10-1. The problem with the faulty hall-adder circuit appears to be in the ______ (Co, sum) output, Which seems to be ______ (stuck HIGH, stuck LOW).
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Table 1: Logic Probe Results on Faulty Half-Adder Circuit
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Inputs
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Outputs
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B
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A
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Sum
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Co
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L
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L
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L
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H
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L
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H
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H
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H
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H
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L
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H
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H
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H
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H
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L
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H
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