Does this affect the speed of the output buffer

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Simulate the operation of the two-stage op-amp in Fig. 26.2. Show that the quiescent current in the output buffers is considerably below the desired 20 µA. (Note that the inputs of the op-amp should be held at VCM in the simulation to keep the diff-amp conducting current) Does this affect the speed of the output buffer? Why or why not?

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Reference no: EM131301261

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