Reference no: EM132536009

Digital Logic Design Lab

Objectives
Apply Sequential Logic Design process to design, implement and test a Finite State Machines

Preparation
Complete the following steps before starting to work on the experiments in this lab:

1) Complete lecture and assignment in Sequential Logic Circuits Analysis and Design Chapters
2) Complete Lab 5 and associated report

Experiment 1 - Delay Circuit
Design and implement a 2-4 second delay using 74HC74 and NE 555. Assuming NE 555 is configured to generate a 2 second clock pulse.

Experiment 2. - Intersection Control Signal System with Time Delay

A three way intersection is in need of a traffic signal control system and you have been assigned the task to design and implement the system. Each direction has only one lane and one set of signal control lights (green, yellow and red). Your design should only allow one go or green light at a time. Further, all transitions from green to red should go through an intermediate 2-4 seconds yellow light. Complete the following steps for this design:

1) Sketch of the intersection with variables identified and respective values defined. Clearly describe any additional assumptions or rules you have added.

2) Document design with tools such as characteristic table, truth table, k-map, state diagram, physical layout, schematic and other as appropriate.

3) Implement the intersection control signal using LED's to represent the lights and switches to represent arrival and departure of cars.

4) Demonstrate your final implementation to the lab instructor based on your test plan which you have already used to validate the design implementation.

Report Requirements

This lab and associated report must be completed individually. All reports must be computer printed (formulas and diagrams may be hand drawn) and at minimum:

For each experiment include:
• Clear problem statement; specify items given and to be found.
• Answer experiment questions
• Resulting circuit schematics, simulation results, and other relevant information from the experiment.

Attachment:- Digital Logic Design Lab.rar