Reference no: EM132240207

Analog IC Design - Mentor Tools Lab - gm/ID Design Methodology

Learning Objectives - In this lab you will:

• Design and simulate a 5T OTA.
• Learn how to generate and use gm/ID design curves.
• Learn how to simulate the open-loop characteristics of the 5T OTA.
• Learn how to simulate the closed-loop characteristics of the 5T OTA.

PART 1: gm/ID Design Curves

Use the following sweep ranges to characterize NMOS and PMOS transistors.

• W = 10um
• L = 0.2um:0.2um:3um
• VGS = (VTH-100m):5m:(VTH+VDD/3)
• VDS = VDD/3

Export simulation results to a csv file then import it in MATLAB.

Report the following design charts vs gm/ID for both PMOS and NMOS:

1) gm*ro

2) ID/W

3) gm/Cgg

4) VGS

5) vth_d (V_ov = V_GS - V_TH)

PART 2: OTA Design

Use gm/ID methodology to design a diff input SE output operational transconductance amplifier (OTA) that achieves the following specs. Use an ideal external 10uA DC current source in your test bench, but design your own current mirror.

Report the following:

1) Detailed design procedure and hand analysis. You need to explain why you chose the architecture that you implemented.

2) A table (in attached file) showing W, L, g_m, I_D, g_m/I_D, vdsat, V_ov = V_GS - V_TH, and V* = 2I_D/g_m of all transistors (as calculated from gm/ID curves).

PART 3: Open-Loop OTA Simulation

Create a testbench as shown above. Note that IDC connection (sinking or sourcing) in the test bench may be different from the one shown above depending on the type of your input pair (PMOS/NMOS). Report the following:

1) Schematic of the OTA with DC node voltages clearly annotated.

• Use VICM at the middle of the CMIR.
• Is the current (and gm) in the input pair exactly equal?
• What is DC voltage at VOUT? Why?

2) Diff small signal ccs:

• Use AC analysis (1Hz:10Gz, logarithmic, 10 points/decade).
• Set VIDAC = 1 and VICMAC = 0.
• Use VICM at the middle of the CMIR.
• Use Measures to calculate circuit parameters as shown below (in attached file.)
• Plot diff gain (in dB) vs frequency.
• Compare simulation results with hand calculations in a table.

3) CM small signal ccs:

• Use AC analysis (1Hz:10Gz, logarithmic, 10 points/decade).
• Set VICMAC = 1 and VIDAC = 0.
• Use VICM at the middle of the CMIR.
• Plot CM gain in dB vs frequency.
• Compare simulation results with hand calculations in a table.

Optional part:

• Use parametric sweep (not DC sweep) for VICM = CMIR-low:10m:CMIR-high.
• Plot CM gain at 1Hz in dB vs VICM.
• Justify the results.

4) CMRR:

• Use Avd and Avcm from the previous simulations (note that we cannot run both simultaneously because we have single ended output, thus we cannot differentiate between diff and CM signals at the output).
• Plot CMRR in dB vs frequency at VICM at the middle of the CMIR.
• Compare simulation results with hand calculations in a table.

Optional part:

• Use parametric sweep (not DC sweep) for VICM = CMIR-low:10m:CMIR-high.
• Plot CMRR at 1Hz in dB vs VICM.
• Justify the results.

5) Diff large signal ccs:

• Use VICM = VDD/2.
• Use DC sweep (not parametric sweep) VID = -VDD:1m:VDD. You must use a small step (1mV) because the gain region is very small (steep slope).
• Plot VOUT vs VID.
• From the plot, what is the value of Vout at VID = 0? Why?
• Plot the derivative of VOUT vs VID. Compare the peak with Avd.

6) CM large signal ccs (GBW vs VICM):

• Use AC analysis (1Hz:10Gz, logarithmic, 10 points/decade).
• Set VIDAC = 1 and VICMAC = 0.
• Use parametric sweep (not DC sweep) VICM = 0:10m:VDD.
• Use Measures or EXTRACT to calculate the GBW.
• Plot GBW vs VICM.
• Annotate the CM input range. Calculate the input range as the range over which the GBW is within 90% of the max GBW, i.e., 10% reduction in GBW.
• Compare simulation results with hand calculations in a table.

7) CM large signal ccs (region vs VICM):

• Use parametric sweep VICM = 0:10m:VDD. DC sweep should also work but sometimes it does not due to bugs in Pyxis.
• Use Measures or extract to find the opmode of the input pair and the tail current source. You may use the following commands to extract the opmode (replace "5T_OTA1" with your OTA instance name): .EXTRACT DC opmode(X_5T_OTA1.M1) and .EXTRACT DC opmode(X_5T_OTA1.M2)
• If you use parametric sweep instead of DC sweep, the region OP parameter will be reported as a number as follows: saturation → 1, linear → 2, subthreshold → 8.
• Plot "region" OP parameter vs VICM for the input pair and the tail current source. Plot the results overlaid on the results of the previous method (10% reduction of GBW).
• Find the CM input range (CMIR). Compare with hand analysis in a table.
• Note that the drawback of this method is that the "region" parameter cannot be experimentally measured in the lab.

PART 4: Closed-Loop OTA Simulation

Create a testbench as shown above. Report the following:

1) Schematic of the OTA with DC OP point clearly annotated in unity gain buffer configuration. Use VIN = CMIR-low + 50mV.

• Is the current (and gm) in the input pair exactly equal? Why?
• Calculate the mismatch in I_D and gm.

2) Loop gain:

• Use STB analysis (in addition to AC analysis 1Hz:10Gz, logarithmic, 10 points/decade) in unity gain buffer configuration. Use VICM at the middle of the CMIR. Set the STB analysis as shown below.
• Plot loop gain in dB and phase vs frequency.
• Compare DC gain and GBW with those obtained from open-loop simulation. Comment
• Compare simulation results with hand calculations in a table.

PART 5 (optional): Effect of Mismatch on CMRR

Copy your testbench in a new cell and modify the new schematic as shown above. Resistors with different AC/DC values are added in order to connect the feedback loop in DC and break it in AC. The DC OP point is set by the unity gain feedback buffer connection, while the AC stimulus is set by the balun. Note that the DC feedback loop will introduce mismatch in the input pair (why?). We will study the effect of mismatch on Avcm and CMRR. Report the following:

1) CM small signal ccs:

• Use AC analysis (1Hz:1Hz, linear, 1 point). Keep OP simulation enabled because we will plot gm.
• Set VICMAC = 1 and VIDAC = 0.
• Use parametric sweep (not DC sweep) for VIN = CMIR-low:10m:CMIR-high.
• Plot gm of the input pair overlaid vs VICM. Use the following commands to extract gm (replace "5T_OTA1" with your OTA instance name): .EXTRACT DC gm(X_5T_OTA1.M1) and .EXTRACT DC gm(X_5T_OTA1.M2)
• The two gm's intersect (are equal) at a specific VIN. Why? What is Avcm at this value.
• Plot CM gain at 1Hz in dB vs VIN. Extract it in Measures as shown below.
• Add a cursor for Avcm @ VIN = CMIR-low + 50mV. Compare simulation results with hand calculations in a table.

2) CMRR:

• Extract Avd and Avcm at 1Hz vs VIN from two AC simulations as in the previous step (note that we cannot run both simultaneously because we have single ended output, thus we cannot differentiate between diff and CM signals at the output).
• Use parametric sweep (not DC sweep) for VIN = CMIR-low:10m:CMIR-high.
• Plot CMRR in dB vs VIN.
• Add a cursor for CMRR @ VIN = CMIR-low + 50mV. Compare simulation results with hand calculations in a table (Hint: use CMRR formula that considers gm mismatch).

Lab Summary -

In Part 1 you learned:

• How to generate and use gm/ID design curves.

In Part 2 you learned:

• meeting desired specifications.

In Part 3 you learned:

• How to simulate the small-signal differential gain of a 5T OTA in open-loop configuration.
• How to simulate the small-signal common-mode gain of a 5T OTA in open-loop configuration.
• How to simulate the large-signal differential characteristics of a 5T OTA in open-loop configuration.
• How to simulate the large-signal common-mode characteristics of a 5T OTA in open-loop configuration.

In Part 4 you learned:

• How to simulate the small-signal differential gain of a 5T OTA in closed-loop configuration.
• How to simulate the small-signal common-mode gain of a 5T OTA in closed-loop configuration.
• How to simulate the large-signal differential characteristics of a 5T OTA in closed-loop configuration.
• How to simulate the large-signal common-mode characteristics of a 5T OTA in closed-loop configuration.

In Part 5 you learned:

• How to simulate the effect of mismatches on the characteristics of a 5T OTA.

Attachment:- Assignment File.rar