Reference no: EM132240177

Analog IC Design - Mentor Tools Lab - Common Source Amplifier

Learning Objectives - In this lab you will:

• Design and simulate a common-source amplifier.
• Learn how to generate and use design charts.
• Investigate gain non-linearity; the variation of the gain with input signal amplitude.
• Study the maximum gain attainable for a resistive-loaded CS amplifier and the effect of supply scaling on max gain.
• Learn how to use feedback to reduce non-linearity (gain linearization).

PART 1: Sizing Chart

In Part 1 you learned:

• How to generate and use design charts for NMOS and PMOS transistors.
• How to design a resistive-loaded common-source amplifier.
• How the overdrive voltage of a MOS transistor deviates from the square law in different regions of operation.

Note - Detailed Question of Part 1 is in attached file.

PART 2: CS Amplifier

1. OP and AC Analysis

1) Create a testbench for the resistive loaded CS amplifier using the V_GSQ, R_D, L and W that you got from the previous part.

2) Use a voltage source that enables DC, AC, and transient simulations to avoid editing the schematicmultiple times: mgc_libs -> sources_lib -> sin_ac_v_source.

3) Simulate the DC OP. Add a monitor for M1 (from DCOP/TRAN) to show the key OP parameters as shown below. Compare the results with the results you obtained in Part 1. Since we used chart-based design, the results should agree well.

4) Compare r_o and R_D. Is the assumption of ignoring r_o justified in this case? Do you expect the assumption to remain justified if we use min L?

5) Calculate the intrinsic gain and compare it to the amplifier gain.

6) Calculate the amplifier gain analytically. What is the relation («, <, ≈, >, ») between the amplifier gain and the intrinsic gain?

7) Create a new simulation configuration and run AC analysis (from 1Hz to 1GHz). Report the gain vs frequency. Annotate the DC gain and make sure it meets the spec.

2. Gain Non-Linearity

1) Create a new simulation configuration. Perform a DC sweep for the input voltage from 0 to V_DD with 2mV step.

2) Report VOUT vs VIN. Is the relation linear? Why?

3) Calculate the derivative of VOUT using EZ wave calculator. Plot the derivative vs VIN. The derivative is itself the small signal gain. Is the gain linear (independent of the input)? Why?

4) Set the properties of the voltage source to apply a transient stimulus (sine wave of 1kHz frequency and 10mV amplitude superimposed on the DC input voltage).

5) Create a new simulation configuration. Run transient simulation for 2ms. Plot gm vs time using this command ".plot tran S(M1->gm)". Does gm vary with the input signal? What does that mean?

6) Is this amplifier linear? Comment.

3. Maximum Gain

1) We want to investigate the variation of gain vs RD. We will use AC analysis to calculate the small signal gain. Set the source AC magnitude = 1. Note that AC analysis is a linear analysis, so we use a magnitude of one such that the output is itself the gain. Keep the DC value of VGS constant at the DC value you selected in Part 1.

2) Run AC analysis with start = 1, stop = 1, and number of points (linear) = 1 (the purpose of the AC analysis is just to get the small signal gain and not to investigate the frequency response). Run parametric sweep (not DC sweep) for RD from ¼ the value you selected in Part 1 to 4 times the value you selected in Part 1.

3) Use "Maximum" function from (Tools -> Measurement Tool) in EZwave to plot the gain vs RD.

4) You will find that the gain increases with RD and then decreases with RD. Justify this behavior.

5) What is the value of RD that gives the highest gain? What is the highest gain?

6) Analytically calculate the value of RD that gives the highest gain and the highest gain using the expressions in Part 1. Compare simulation and analysis results.

7) What is the available signal swing at the point of maximum gain?

8) Is scaling down the supply voltage good for gain? Comment.

4. Gain Linearization (feedback)

1) We will use feedback to improve the gain non-linearity. We will study feedback in more details later.

2) Create a new schematic. You may copy instances from the old schematic to the new schematic by opening them as multiple tabs inside the same Pyxis Schematic window.

3) Replace the resistive load with a PMOS current source (active load) as shown below. Create a sizing chart for the PMOS similar to what we did for NMOS in Part 1 using L = 2μm and W = 10μm (you may use the same test bench used in Part 1). From the chart, assuming V_Q* similar to NMOS, determine V_GSQ and I_DX. Using ratio and proportion (cross-multiplication) determine W similar to Part 1. Note that the PMOS load must have the same bias current as the NMOS input device.

4) Add two resistors: input resistor (R_in) = 1MEG and feedback resistor (R_f) = 4MEG (this should give a voltage gain approximately equal to R_f/R_in = -4). Note that 1M is the same as 1m = 1 milli because Eldo (Mentor analog simulation engine) is not case sensitive.

5) Perform a DC sweep for the input voltage (VSIG) from 0 to V_DD with 2mV step.

6) Report VIN and VOUT vs VSIG (overlaid). At what voltage do the two curves cross? Why?

Hint: Compare this voltage to VGS of M1. The center value of the amplification region is itself VGS of M1. At this point VOUT is also equal to VIN because no current flows in the two resistors.

7) Is VOUT vs VSIG linear? Why?

8) Calculate the derivative of VOUT using EZ Wave calculator. The derivative is itself the small signal gain. Is the gain linear (independent of the input)? Why?

9) What is value of VIN in the part where the gain is linear?

10) Analytically calculate the DC input range over which the gain is linear. Compare your analysis with the simulation result.

In Part 2 you learned:

• How to do ac and DC simulations of a CS amplifier.
• How the gain of an amplifier changes with the input signal amplitude.
• How to get the maximum attainable gain of a CS amplifier by changing the load resistor.
• How to use feedback resistors to reduce gain non-linearity.

Attachment:- Assignment File.rar