Design and build a simple intrusion detection and alarm

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Reference no: EM132238729

Lab 4: Alarm System
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In this lab you will design and build a basic burglar alarm using a complex state machine. You will use several methods to reduce the complexity of the state machine and the associated combinational logic which reduces costs and also results in a design that can be solved using K-Maps.

You will undertake this project in groups of two.

The marking will be individual marking and
students may well get quite different marks depending on their log books, what they have personally done, and their ability to answer questions.

THE PROBLEM is to design and build a simple intrusion detection and alarm system.
The alarm system is required to activate a siren if an intruder is detected. The siren must run for a specified time and then stop. The siren output is a simple logic output.
A single momentary switch input is used to trigger the alarm, the period of the activation may be shorter than the period between clock edges.
The alarm system can be armed/disarmed by the user at any time using a latch switch.

DELIVERABLES include-
• A self assessment sheet.
• A block diagram of the main elements of the alarm and the signals that flow between them. This must include the counter, SR flip-flop, and state machine.
• A state diagram to explain the operation of the state machine.
• For each state machine flip-flop input a truth table, K-Map and boolean logic for the combinational logic which takes state plus inputs to create the flip-flop inputs.
• Boolean logic for the outputs.
• Complete schematic for the system.
• A complete working system on a breadboard (or two).

REQUIREMENTS & CONSTRAINTS include-
• When the alarm system is powered, but not armed, the green LED GLED will be active.
• Arming the alarm system will activate the red LED RLED and deactivate GLED.
• Arming/Disarming the alarm system will be controlled by a latch switch (DIP switch) named ARM, or arm. When active it will; case the alarm to be armed, when inactive it will disarm the alarm unless otherwise noted.
• If an intruder has been detected (momentary switch pushed) while the alarm system is

armed, then there must be an entry delay of at least one clock cycle delay before the active high Siren output will be activated for the clock periods identified in the table below.
• When the siren period ends it must go back to the armed state.
• The arm switch may not cause a siren output to be stopped while active but it must cause the entry delay period to abort such that the siren will not sound.
• Since the intruder detector (I) is activated by the momentary switch, you will need to use an SR latch to latch the output from the switch. The SR latch will need to be reset before the next armed state.
• The project is done in groups of two. Allocating tasks and work must start ASAP, if a group is not working see the tutor immediately.
• You must design the system using your kit of logic gates, use HC74 flip-flops for memory elements and the HC193 counter as a timer.
• For the purposes of marking (and debugging) all key signals and the flip-flop outputs should be shown on LEDs. It would be helpful to have the flip-flop inputs also shown on LEDs.
• All LEDs and switches must be clearly labeled.

STUDENT NUMBER REQUIREMENTS: look at the last digit of student number of the youngest team member. Below are the requirements you must satisfy.

Last digit

State Numbering Constraint Q1,Q0:Unarmed state, next state

Timer period in clock cycles.

6

01,10

2

7

00,10

3

8

01,00

4

9

01,11

2

0

11, 10

3

1

11,01

4

2

10,11

2

3

10,01

3

4

11,00

4

5

00, 11

2

If the younger student number is odd then the armed switch is active high (high = move from unarmed to armed). If the student number is even then the switch is active low.
Look at the student number of the older student. If it is odd then use the borrow output from the counter to indicate the timeout. If it is even use the carry output instead.

HINTS include-
• This is a long lab and you should start well before the nominated date to be sure of getting a good result. Try getting a partner early and starting work.
• In first week of Lab 4 the tutor will help you draw a block diagram of the system and define the signals that go between the blocks. You should also get your counter counting up and down and observe carry and overflow. The tutor will help you if you get stuck. This is an important help session.
• Make sure all your work is neatly written up in your log book and the book is signed every week.
• The tutor is happy to help you, providing you have a proper schematic circuit and relevant design work in your log book.
• Be very certain about whether signal are active high or low. Apart from requirements constraints you can choose which way you like in order to minimize the logic.
Adopt a naming convention to highlight active low and active high, perhaps the one in the notes (reset is active low, RESET is active high).
• Review all the methods you know of minimizing the logic.
• The reset on the SR flip-flop will need to be cleared at some point so the record of intrusion can be cleared.
• All outputs are shown by LEDs. You have the choice of connecting the LED and resistor from the output to +5v or 0v.
• How will your circuit be forced to the initial state?
• Split the work between partners and start ASAP. Think about how to connect your two breadboards.
• The HC193 is more complex than the chips you have used to date. Make sure you understand the behavior of all inputs and outputs and what inputs you need to make the counter load and count. One team member should build the timer circuit ASAP to ensure this is under control. Note the rule about whether you must use borrow or carry.

 

 

Reference no: EM132238729

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