Design a finite state machine to control such a multiplier

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Reference no: EM13269517

A "shift and add" multiplier works as follows: given two n bit numbers X and Y , look at the LSB of X: if it is one, then add Y to the running sum. If it is zero, then don't do anything (since multiplying by 0 is 0!). Next, shift X to the right by 1 and Y to the left by 1. And repeat until done (when is that?). Design a finite state machine to control such a multiplier. First think about the data path you'll need: what are the control inputs to the FSM? What is connected to what? What kind of control outputs do you need?

Reference no: EM13269517

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