Reference no: EM132595680
Question 1: When testing the circuit of Figure 1(a) it was found that the output shown in Figure 1(b) was obtained when the input was connected to ground.
Explain why this was so and attempt an estimate of the capacitance values of C.
Question 2: Design a circuit to produce a rectangular wave of period 100 µs and 60% duty cycle. Any capacitors used are constrained to the value of 1 nF.
Question 3: Explain why obtaining a duty cycle of 50% or less cannot be achieved using the ‘555' circuit of Figure 2.
Describe a method by which the circuit could be modified to give a duty cycle of less than 50%.
Question 4: Figure 3 represents a ‘555' timer used to control a process. The process should commence when the START switch is operated and then continue for a period of 15 seconds (T) or until the STOP switch is activated.
Design a circuit to meet this specification.
Question 5: Figure 4(a) shows the circuit of an oscillator and Figure 4(b) gives the gain and phase response of the op-amp used.
When the circuit was simulated in PSpice using an ideal op-amp, the circuit oscillated at the design frequency. However when the ideal op-amp was replaced by the TL072 the frequency of oscillation was observed to be about 15% lower.
Investigate this anomaly giving your answer in the form of a report of about 750 words. The report should attempt an analysis of the circuit and include the results of any PSpice simulations. You may wish to use the transfer function derived as equation 6 in the appendix to lesson 3-1 to calculate the phase shift in the RC network.
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