Design a circuit that performs the logical function

Reference no: EM132538761

Problem

Design a circuit that performs the logical function f_i = (x + y)zw_i, i ∈ [0,127], where x, y z, and w, are binary inputs and f, binary outputs (yes, the system really has 128 separate w inputs). Use the technology specified in the table below.

Gate	Fanin	Fanout	Tp (ns)	Load (L)	Area (EG)
NAND	2	12	0.05+0.04L	1	1
NOR	2 1 ¹_I	12 12 ∞	0.07+0.05L	1	1
NOT			0.02+0.02L 0.15+0.01L	1 2	1 I 4
BUFFER			0.02+0.02L 0.15+0.01L	1 2	1 I 4

The delay of the critical path must not exceed 1.5 ns when all output gates have a load factor of 2. Determine the delay. Try to achieve a result with small area within the timing restrictions. Determine the area.

Reference no: EM132538761

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