Describe how would design a gray code counter without vhdl

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Explain why the low value (0) for the 'output' of a digital logic gate is lower than the low value for the 'input' of a digital logic gate? (This is the case for CMOS and Bipolar logic). Look at a specsheet.
Are the high values for input and output different also. If so whyand if not why not?

Describe how you would design a Gray code counter without VHDL?

Reference no: EM13291380

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