Describe a single model for vector machines

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Reference no: EM132334552

COMPUTER SYSTEMS ARCHITECTURE

General Objectives

1. To understand and analyze computer systems architecture.

2. To understand the design of the control unites of a processor.

3. To understand the structure of computer instruction set

4. To understand the organization of different bus systems, and their characteristics in a computer system.

5. To understand the importance, organization and management of computer memory system.

6. To understand low-level parallelism and its implementation in a processor

1 To recognize and understand the operation of different functional units in a computer systems architecture.

To explain :

Basic processor architecture.

Processor data path.

Fetch and execute cycle.

Interrupts.

2-3 To understand alternative computer systems architecture.

To present and explain Von Neumann’s architecture and its feature.

To present and discuss alternative computer systems architecture.

E.g. RISC and VECTOR

Explain basic vector architecture

Describe vector length and stride

Describe a single model for vector machines

Explain how to enhance vector performance

Evaluate the performance of vector processors

Present RISC Architecture

Discuss its merits

Evaluate RISC systems performance architecture
 
4-5 To understand :

• The functions of a control unit.

• Different types of control units

• Microprogramming concept

To explain:

The structure of control unit.

Hardwired control unit

The design of Microprogrammed control unit.

Examples of micro program

6 -7 To understand the design of computer instruction set

To explain:

The design of instruction set

The classification of instruction set.

The operation of an instruction set

The types and size of operands

The instruction set of a typical computer system.

8-9 To understand the bus system concept and structure

To explain:

The Bus concept

And draw different bus architecture.

The concept of single bus and multiple bus architecture.

To compare and contrast different bus architecture

To state and explain the organization of ISA, EISA, VESA, PCI standard interface Bus systems.

10-11 To Understand:

Memory hierarchy

The function of backing store, Internal store and Cache

To explain:

Memory structure of a computer system.

Backing store

Internal store

Cache and cache layer.

Computer registers

The purpose and function of different level of memory in the overall structure.

12-13 To understand:

Memory management

To explain:

The concept of virtual memory.

The concept of one level store.

Memory management technique, [Page, segment page segment.

14-15 To understand:

Concept of parallel execution of instruction in a processor

Concepts of pipelining and its contribution to processor speed of instruction execution.

Performance optimization using pipelining.

To explain:

The concept of parallel computing

How parallel computing can be achieved

The benefits of parallel computing

Fault tolerant computing.

Pipelining

A basic pipeline for a typical computer system.

Problems associated with pipeline operation

Performance optimization using multi level cache.

Reference no: EM132334552

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