Create seven-bit adder in logicworks

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Reference no: EM1371246

You need to draw the circuit diagram in LogicWorks and explain your design with either separate electronic documents or text in LogicWorks.

1. Design a 7-bit adder. The inputs are X[6..0], Y[6..0], and Cin. The outputs are S[6..0] = X[6..0] + Y[6..0] + Cin, where + is arithmetic addition. Implement the adder in LogicWorks. The parts you can use include

1) 74x182,
2) GP units,
3) 1-bit adders without carry out.

A GP unit generates active low G and P signals for a pair of inputs A and B. GP units and 1-bit adders without carry out are available in the library you can download from the
course website. Since you are dealing with many similar signals, using the bus features in LogicWorks
can save you a lot of time.
Note that you CANNOT use existing 4-bit adders in the LogicWorks's library. If you think the problem is too easy, you had better have TA or the instructor check your design.

2. Implement an ABS4 circuit, which computes the absolute value of a 4-bit two's complement number. The input signals are X[3..0] and the output signals are Y[3..0]. Both X and Y are two's complement numbers.

a)  Implement an ABS circuit with the following parts. The circuit generates correct absolute values if it can be represented with a 4-bit two's complement number.

1. A 4-bit adder with carry in (e.g., Adder-4 in LogicWorks),
2. Up to four XOR gates.
b) Your circuit works for most of the input values. However, it may have an overflow for some inputs. When do you get an overflow? Which signal on your circuit indicates an overflow? Explain your answer.

Reference no: EM1371246

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