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A sequential circuit receives decimal numbers encoded in BCD one digit (4 bits) at a time, starting with the least significant digit. The circuit outputs are the 10's complement of the input number, also encoded in BCD least significant digit first. Input decimal numbers are separated by one or more inputs of all 1's, during which the circuit outputs all 1's. Once valid BCD digits of a new number start, the circuit resumes computing and outputting the 10's complement of the new number.Construct a state table and an output table for the circuit.
a dsp system is given with the following specifications: design requirements: sampling rate 20,000 Hz Maximum allowable gain variation from 0 to 4,000 Hz = 2dB 40dB rejection at the frequency of 16000 Hz
calculate the short-circuit current of a three-phase delta-wye connected transformer if the short circuit occurs between phase A and the neutral at the low voltage side, and the transformer is supplied by a 13 kV line-to-line voltage.
An iron ring with a 50-cm mean diameter has a square cross-section of 4 cm2. It is wound with two coils having 1000 and 400 turns. Calculate (a) the self inductance of each coil, and (b) the mutual inductance between them.
Interface TTL logic to 120 VAC lamp. In this part of the lab, you will interface lowpower solid state electronics to the "outside world" by switching the 120 VAC lamp on and off using the AND gate from the previous experiment.
Supply the quantisation levels (including zero) that are available. Do this for both the three and 4-bit ADC in table form. What is the resolution of each quantizer?
150 kVA, 2400/240 V single-phase transformer has the parameters. (a) Determine the equivalent circuit referred to the high-voltage side. (b) Find the primary voltage and voltage regulation when transformer is operating
Consider a virtual memory system that can address a total of 232 bytes. You have unlimited hard drive space, but are limited to only 8 MB of semiconductor (physical) memory. Assume that virtual and physical pages are each 4 KB in size.
Design a garage door controller using PLC Ladder Diagram (RSLOGIX 500 PLC SIMULATOR). The behavior of the garage door controller is as follows there is a single button in the garage, and a single button remote control.
A shunt regulator utilizing a zener diode is biased on through a 100ohm resistor. Determine the change in the regulated output voltage for the two situations below a) VI changes +2.0 V, ILoad constant b) ILoad changes +100 mA, VI constan..
Consider a linearly graded Si p-n junction. Find a relation for the potential across the depletion region. Hint: Start from equation 29 in chapter 3 of the text book. Integrate the electric field to find the potential.
Problem 1: It is desired that an Arduino along with an EduShield be used to control 6 camerassimultaneously. Each is made by a dierent company: a Canon, a Nikon, an Olympus, a Pentax,a Sony, and a Minolta.
A thyristor is triggered by a pulse of train of 5kHz.The duty ratio of the pulse train are 0.5. If allowable average gate power is 100W, calculate the maximum allowable gate drive power.
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