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Consider the pipelined implementation devoid of forwarding

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Reference no: EM13470216

Consider the pipelined implementation (without forwarding and/or stalling) of the MIPS microprocessor.

(a) Explain how this pipelined implementation deals with I-type conditional branch instructions in the case the
branch is not taken and in the case the branch is taken.

(b) Explain why data dependency hazards may occur in this implementation.

(c) List all possible instruction sequences that may exhibit data dependency hazards.

(d) For each sequence in (c), give a software equivalent that does not suffer from the data dependency limitation.

Reference no: EM13470216

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