Reference no: EM132531216
A computer system has a 64KB main memory and 1 KB space for the cache memory, and transfer between cache and main memory is 16 * 8 Blocks, uses 2 space blocks in each set, and uses LRU when deciding to change blocks, uses Read Through for read, Write allocate for write and simple write back for write back.
a) in access to main memory address which sub-spaces are divided and how much bits of the spaces?
b) in this system main memory, each element has 8bit has 2 arrays, the start of these address is arr1 = $0000, arr2 = $0200, and a mips program will read and compare these two arrays and writes the big one into array starts with address arr3 = $0410, initially assume that the cache memory is empty in which set and which blocks will the arrays will be placed, while the program is run which moment the the transfer between cache and main memory will be occur.?
c) when this program ends, calculate the hit ratio, when you know the cache access time is 10ns and between main memory and cache memory blocks transfer time is 100ns according to above data, calculate the average memory access time?
d) to reduce the average memory access time in which main memory address we should place the arrays?
e) in which main memory addresses we should place the arrays to make the worst average memory access time ?
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