Computer architecture x uses variable-length instructions

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Computer architecture X uses variable-length instructions of several different formats, each occupying a whole number of bytes (or a number of bits that is a multiple of 8)Format 1 begins with four flag bits, followed by a 0 bit, followed by an opcode and a 12-bit signed 2's complement
offset.
Format 2 begins with four flag bits, followed by bits 10, followed by an opcode, two 5-bit register fields and a 16-bit signed 2's complement immediate operand.
Format 3 begins with four flag bits, followed by bits 100, followed by an opcode, three 5-bit register fields and an 8-bit unsigned immediate operand.
Format 4 begins with four flag bits, followed by bits 110, followed by an opcode, two 5-bit register fields and a 13-bit signed 2's complement immediate operand.
Assume that no opcode exceeds 8 bits.
(a) Illustrate each instruction format (see Figure 9-14 for an example).
(b) How many registers does the architecture X employ?
(c) How many bits are used for the opcode in each of the four formats?
(d) What is the (decimal) numeric range of the offset in format 1?
(e) What is the (decimal) numeric range of the immediate operand in format 2?
(f) What is the (decimal) numeric range of the immediate operand in format 3? ?22?
(g) What is the (decimal) numeric range of the immediate operand in format 4?
(h) How many different operations (opcodes) can this architecture specify?
(i) Describe the types of operations performed by instructions in formats 2 and 4.
(j) Compare formats 3 and 4, in terms of potential operations that can be specified by each. Is either of these formats clearly better than the other?

Reference no: EM13383781

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