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Question 1. Complete the 4-bit full adder we developed in class. Include screen shots of your HA, FA 1bit, FA 4bit subcircuits (there is a zoom tool in the lower left hand corner of the Logisim simulator that may be of use for this part).
Question 2. Include screen shots of your main circuit for the following test cases (assuming two's complement representation using 4-bit operands): a. 5 + 4 b. 4 - 5 c. -7 - 5 d. -2 + 2 e. -3 + 7 f. make up a test case g. make up a test case
Question 3. For each of the above test cases, include your prediction of the sum and NCVZ flags (i.e. show the calculation by hand in binary in order to confirm that the circuit is working as you have predicted). No credit will be given without including your calculations.
This is the FA
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