Reference no: EM134561

An asynchronous sequential logic circuit is given on Page by its primitive flow map (i.e., initial state table) where X1 and X2 are inputs and Z is the circuit output.

Tasks:

a) Reduce the number of states using the method you have learned in class (Implication Table, compatible states, Cover Table). In addition, check to see whether the closure criteria is met by using a Closure Table. Try to make the classes of compatible states disjoint. Give the reduced state table.

b) Use the methods you have learned in class to a make critical-race free state assignment. Show your assigned state table.

c) Check for essential hazards. Give the path for each (if any). Eliminate them (if any) and explain how it can be done.