Analyze memory performance for a write and read operation

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Reference no: EM13249784

1. The goal is to design a memory system to support a small amount of data storage outside of the processor. The design is to be based on the 16K bit CY7C128A SRAM organized as 2Kx8.
(a) Provide a high-level block diagram for such an interface.
(b) Provide a high-level timing diagram for the interface to the SRAM from the microprocessor, assuming that separate address and data busses are available. Define any control signals that may be necessary.
(c) Design the interface based on the timing diagram from part (a).
(d) Analyze the memory performance for a write and read operation of 1, 10, and 100 bytes.

2. For the following aspects of an embedded application, provide a data and control flow diagram.
(a) Reading/writing from/to a USB port and a general parallel port
(b) Accessing and reading a mouse
(c) Accessing and reading keys from a keyboard
(d) Controlling and accessing a digital-to-analog convert
(e) Controlling and accessing analog-to-digital convert
(f) Burning a CD
(g) Transferring data from an external device to memory and then to a display
(h) Managing and controlling a video on demand system in a motel or hotel
(i) An automatic process for filling and capping bottle of juice on an assembly line

Reference no: EM13249784

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