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suppose that a continuous time sinusoid x(t) = sqrt(2)*cos(3200*Pi*t + pi/4) is sampled with a sampling frequency of fs, producing the discrete-time signal x[n] = x(n/fs).Find a value of fs so that x[n] = (-1) ^ n
A unit for a telecommunications system is to be designed so as to have a minimum availability of 0.9994. The MTTR (mean time to repair) for the unit is estimated to be 24 hours.
A long shunt cumulative compound motor is run at full load. It is rated 240 V, 10 A, 1200 rev/min. If Rf=180 ?, Ra=2 ?, Rs=1.22 ?, and the stray power losses are 160 W, find: a. The back EMF. b. The power rating.
given appositive number α, determine the constants A,B,C such that the iteration converges locally to 1/α with orderp= 3. (this will give a cubically convergent method for computing the reciprocal 1/α which uses on addition, subtraction, and multi..
A Si p+-n junction has a donor doping of 5*10^16 cm^-3 on the n side and a cross sectional area of 10^-3 cm^2. If τ(p)= 1μs and D(p) = 10cm^2/s, calculate the current with a forward bias of .5V at 300K.
A square in the x-y plane in free space has a point charge of+Q at corner (a/2, a/2), the same at corner (a/2, -a/2), and apoint charge of -Q at each of the other two corners. (A) Find the electrical potential at any point P along thex-axis.
A 2000 hp, 1.0 power factor three phase Y connected 2300V, 30 Pole, 60Hz; synchronous motor has a synchronous reactance of 1.95 ohms/phase. For this problem all losses may be neglected.
what single amount at the end of seven years is equivalent to a uniform annual series of %5000 per year for 12 years if the interest rate is 8% compounded annually
Indctance = 300nH/m, Capacitance = 53pF/m, Frequency = 0.02HzA coax cable... start with the general form of thecharateristic impedance state any approximations and find the expression for the charateristic impedance.
Design a four-bit shift register with a paralel load, usingD-flip-flops. There are two control inputs:shift and load. Whenshift t=1, the contents of the register are shifted by oneposition. New data are transferred into the register when load=1and..
In the pure resistive circuit the current is not not legging, while the resistor provides opposition to the flow of current. Does Current leggs behind the voltage in pure resistive circuit or not.
The counter will use the falling edge of the clock (denoted by Clk) and have a separte reset pin (R) which will reset the counnter to 0000 when it is low (e.g. R=0). Please use D type flip-flops. write down the state diagram , and state table.
A clock signal is connected to input A, i.e G(ate) input of the transistor. When the signal is high "1" the transistor is on. When the signal is low "0" the transistor is off. What is the minimum voltage the clock signal must have in the high state..
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