Biasing the Field Effect Transistor

Self Bias:

Figure 1, shows a self bias circuit another manner by which we can bias a FET. The drain supply is used only and no gate supply. The basic idea is to make use the voltage across R_S to produce the gate source reverse voltage.

This is the form of a local feedback which is similar to that which we use with bipolar transistors.  If we increases drain current, the voltage drop across RS increases as the ID RS increases. This increases gate source reverse voltage which makes the channel narrow and reduces drain current.  The overall effect is to offset the original increase in drain current. Likewise, if ID Figure 1 decreases, drop across R_S decreases, hence the reverse bias decreases and I_D increases.

As the gate source junction is made reverse biased, negligible the gate current flows through R_G and so the gate voltage with respect to the ground is zero.

V_G= 0;

The source to ground voltage equals the product of drain current and source resistance.

\ V_S= I_D R _S.

The gate source voltage is difference in between the gate voltage and the source voltage. V_GS = V_G - V_S = 0 - I_DRS

V_GS = -I_D R_S.

This means that the gate source voltage equals the negative of the voltage across the source resistor. The greater the value of drain current, more negative the gate source voltage becomes.

By rearranging the equation: I_D = -V_GS / R_S

The graph of this equation is called as self base line a shown in the figure 2.

Figure 2

The operating point on the transductance curve is intersection of the self  bias  line  and  transductance  curve. The slope of line is (-1 / R_S). If the source resistance is large (-1 / RS  is small) then Q-point is far down the transductance curve and drain current is small. When the value of R_S is small, the Q point is far up the transductance curve and drain current is large. In between there exist an optimum value of R_S  which sets up a Q point near the middle of the transductance curve.

The transductance curve ranges widely for FET (due to the variation in I_DSS and V_GS(off)) as shown in the figure 3.  The actual curve can be between there extremes. A and B are optimum points for the 2 extreme curves. To find out the optimum resistance R_S, so that the Q-point is accurate for all the curves, A and B points are joined so that it passes through the origin.

The slope of this line provides the resistance value R_S( V_GS = -I_D R_S). The current I_Q is such that I_A > I_Q > I_B. Here A, Q and B all points are in the straight line.

Fig. 3

By taking the case where a line drawn to pass in between points A and B does not pass through the origin. The equation VGS = - I_D R_S is not appropriate. The equation of the line is V_GS = V_GG - I_D R_S.

This type of a bias relationship can be obtained by adding a fixed bias to the gate in addition to the source self bias as shown in the figure 4.

Figure 4

In the circuit

V_GG = R_S I_G + V_GS + I_D R_S

Since R_S I_G = 0;

V_GG = V_GS + I_D R_S

or     V_GS = V_GG- I_D R_S

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