Applied voltages B-E Junction B-C Junction Mode (PNP)
Bias (PNP) Bias (PNP)
E < B < C Reverse Forward Reverse-active
E < B > C Reverse Reverse Cut-off
E > B < C Forward Forward Saturation
E > B > C Forward Reverse Forward active
In the terms of junction biasing: ('reverse biased base collector junction' means Vbc < 0 for NPN, opposite for the PNP)
- Forward-active: The base emitter junction is forward biased and the base collector junction is reverse biased. Most of the bipolar transistors are designed to afford greatest common-emitter current gain, βF, in the forward-active mode. If this is the case, the collector- emitter current is proportional to the base current, but many times larger, for the small base current variations.
- Reverse-active: By reversing the biasing conditions of forward-active region, a bipolar transistor goes into reverse-active mode. In this particular mode, the emitter and collector regions switch roles. Because most the BJTs are designed to maximize current gain in the forward-active mode, the βF in inverted mode is several (2-3 for ordinary germanium transistor) times smaller. The transistor mode is seldom used, typically being considered only for failsafe conditions and some kinds of bipolar logic. The reverse bias breakdown voltage to the base can be an order of magnitude lower in the region.
- Saturation: With having both junctions forward-biased, a BJT is in the saturation mode and facilitates high current conduction from emitter to collector. This mode corresponds to the logical "on", or a closed switch.
- Cut-off: In the cut-off, biasing conditions opposite of the saturation (both junctions reverse biased) are present. There is very less current, which corresponds to the logical "off", or an open switch.
- Avalanche breakdown region
Although these areas are well defined for adequately large applied voltage, they overlap somewhat for small (less than a few hundred millivolts) biases. For instance, in typical grounded-emitter configuration of an NPN BJT used as the pulldown switch in the digital logic, the "off" state never has a reverse-biased junction because the base voltage never goes below ground; however the forward bias is close enough to zero that essentially no current flows, so this end of forward active region can be regarded as cutoff region.
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