Fixed- and Floating-point Digital Signal Processing:

DSP involves intensive number crunching.

  By the integer data we shall mean that the decimal point is at extreme right end and can thus be ignored. By the real numbers we mean that the decimal point can be somewhere other than at extreme right but is fixed always; this allows the data to contain the fractional part. We shall use the "fixed-point" to cover integers and real numbers both. This type of data has a limited range.

  By floating-point data we mean that position of the decimal point is not fixed and is adjusted to suit the other data it should interact with and operations it goes through and the results.

  Early DSP processors offered integer- mode only of data and arithmetic. Even today the fixed-point DSPs flourish (or, are forced on the DSP developers) because of the realities of speed, cost, size, and power consumption. The DSP community has developed intricate numeric techniques to use the fixed-point devices. Nowadays there are floating-point DSPs but these still tend to be much expensive, more power hungry and larger than their fixed-point counterparts physically.

 

Fixed-point DSPs

What are the consequence of preferring the fixed-point DSPs over floating point DSPs (in some of the applications) for the reasons mentioned above? The price is the extended development time. After the needed algorithms have been simulated on the computers with floating point capabilities, floating point operations should be carefully converted then to integer ones. This involves

1.  Rounding

2.  Rescaling (because of limited dynamic range) at various points

3.  Underflow and overflow handling

4.  Placement of the rescalings at the optimal points (to ensure the maximum signal to the quantization ratio)

5.  Matching of precise details of processor's arithmetic with the other systems for the interoperability or with the standard for conformity

These tasks can require large simulation.

  The common most fixed-point representation is 16-bit two's complement (24- or 32-bit registers exist). In the fixed point DSPs this should accommodate integers and real numbers both.

A real number can be represented by multiplying it by the large number and rounding; consider the coefficient a of IIR filter y(n) - a y(n-1) = x(n), 0 ≤ a ≤ 1. On the 8-bit fixed-point processor 1 becomes 256, and range for a is 0 ≤ a ≤ 256.

With the 16-bit operands, bit growth (or, increase of the precision) means that their sum require 17 bits and their product require 32 bits.

 
With the DSP using fixed-point arithmetic, if product is 32 bits the accumulator could be 40 bits long; this allows 8 MACs to be performed without any fear of the overflow. At the end of the loop a single check and possible discard can be performed. A 2nd possibility is to provide the optional scaling operation as the part of MAC instruction itself (mainly a right-shift of the product before addition, built into the pipeline). Thirdly, the saturation arithmetic is the last resort: whenever an overflow (or underflow) takes place the result is replaced by the largest or smallest possible of the appropriate sign. The error introduced is smaller than caused by the straight overflow (that is, roll-over of the register).

  With the fixed-point processors, the filter coefficients must not be rounded simply; rather the best integer coefficients must be determined by using the optimization procedure.

Floating-point DSPs avoid several of the above problems. There is IEEE floating point standard.

  The floating-point DSPs do not have instructions usually for the division, square root, powers, trig functions etc.

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