FIR implementation of sampling rate conversion

The anti-aliasing filter in a decimator and the anti-imaging filter in an interpolator may each be either an FIR or an IIR filter, the former being preferred since it offers linear phase. We give here the FIR implementation.

Implementation of Decimator The process of decimation consists of an anti-aliasing (low pass) filter followed by a down-sampler. We repeat below the block diagram developed earlier.

Taking the filter H(z) to be an FIR filter, the decimator is implemented as shown below, using a direct form structure for H(z). Note that the coefficients {bi, i = 0 to (N-1)}, used in earlier formulations, are the same as {h(i), i = 0 to (N-1)} used in this diagram. Further, the FIR filter here is implemented with N coefficients rather than (N+1) coefficients.

The implementation equations which correspond to the above structure are

We first compute v(n) for all values of n. Then y(n) is obtained by retaining every M^th value of v(.), dropping the intervening (M-1) values. In other words there are (M-1) computations of v(.) that could be avoided.

We may use identity #1 to move the down-sampler to the left of the adders and the result of Example to move it to the upstream side of the multipliers as shown below. As a result the number of multiplications is reduced by 100(M -1)/M%.

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