FET as amplifier
Similar to the Bipolar junction transistor, JFET can also be taken in use as an amplifier. The equivalent circuit of AC of a JFET is shown in the figure 1.
![1351_FET -amplifier.png](https://www.expertsmind.com/../CMSImages/1351_FET -amplifier.png)
Figure 1
The resistance in between the gate and the source RGS is quite high. The drain of a JFET behaves like a current source with the value of gm Vgs. This model is applicable at the low frequencies.
From AC equivalent model
![1354_FET -amplifier1.png](https://www.expertsmind.com/../CMSImages/1354_FET -amplifier1.png)
![1975_FET -amplifier2].png](https://www.expertsmind.com/../CMSImages/1975_FET -amplifier2].png)
Amplification factor µ for FET can be defined as
![2073_FET -amplifier3.png](https://www.expertsmind.com/../CMSImages/2073_FET -amplifier3.png)
When VGS = 0, gm has its maximum value. The maximum value is designated as gmo.
Again consider the equation,
![1007_FET -amplifier4.png](https://www.expertsmind.com/../CMSImages/1007_FET -amplifier4.png)
![1801_FET -amplifier5.png](https://www.expertsmind.com/../CMSImages/1801_FET -amplifier5.png)
![2014_FET -amplifier6.png](https://www.expertsmind.com/../CMSImages/2014_FET -amplifier6.png)
As VGS increases, gm decreases linearly.
![547_FET -amplifier7.png](https://www.expertsmind.com/../CMSImages/547_FET -amplifier7.png)
Measuring IDSS and gm, VGS(off) can be determined
Figure 2, shows the common source amplifier.
![409_FET -amplifier8.png](https://www.expertsmind.com/../CMSImages/409_FET -amplifier8.png)
Figure 2
When a small AC signal is coupled into the gate it creates variations in gate source voltage. This generates sinusoidal drain current. As the AC current flows through the drain resistor. The amplified AC voltage is obtained at output. Increase in the gate source voltage generates more drain current, which shows that the drain voltage is decreasing. As the positive half cycle of input voltage generates the negative half cycle of output voltage, we obtain the phase inversion in a CS amplifier.
The AC equivalent circuit is shown in the figure 3.
![2259_FET -amplifier9.png](https://www.expertsmind.com/../CMSImages/2259_FET -amplifier9.png)
Figure 3
The AC output voltage can be given as vout = - gm, v gS RD
Hear the negative sign means phase inversion. Because the AC source is directly connected between the gate source terminals hence the AC input voltage equals
Vin = Vgs
The voltage gain can be given by
![34_FET -amplifier16.png](https://www.expertsmind.com/CMSImages/34_FET%20-amplifier16.png)
The further simplified model of the amplifiers is shown in the figure 4.
![745_FET -amplifier10.png](https://www.expertsmind.com/CMSImages/745_FET%20-amplifier10.png)
Figure 4
Hear Zin is the input impedance. At the low frequencies, this is the parallel combination of R1|| R2|| RGS. Since RGS is quite large, it is parallel combination of R1 & R2. A Vin is output voltage and RD is output impedance.
Because of the nonlinear transductance curve, the JFET distorts large signals, as shown in the figure 5.
Given a sinusoidal input voltage, we obtain a non-sinusoidal output current in which the positive half cycle is elongated and negative cycle is compressed. This kind of distortion is called as Square law distortion because transductance curve is parabolic.
![254_FET -amplifier12.png](https://www.expertsmind.com/../CMSImages/254_FET -amplifier12.png)
Figure 5 Fig. 6
The distortion is undesirable for an amplifier. One method to minimize this is to keep the signal small. In that case the part of curve is used and operation is nearly linear. At times swamping resistor is taken in use to minimize the distortion and gain constant. Now source is no longer AC ground as shown in the figure 6.
Drain current through rS produces an AC voltage in between the source and ground. If rS is large sufficiently the local feedback can swamp out non-linearity of the curve. Then the voltage gain reaches the ideal value of RD / rS.
Since RGS reaches infinity thus, all the drain current flows through rS producing a voltage drop of gm VgS rS. The Ac equivalent circuit is shown in the figure 7.
![1091_FET -amplifier13.png](https://www.expertsmind.com/../CMSImages/1091_FET -amplifier13.png)
Fig. 7
![12_FET -amplifier14.png](https://www.expertsmind.com/../CMSImages/12_FET -amplifier14.png)
The voltage gain decreases but voltage gain is quite less effective by making change in gm. rS should be greater than 1 / gm only then
![1727_FET -amplifier15.png](https://www.expertsmind.com/CMSImages/1727_FET%20-amplifier15.png)
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